1. Field of the Invention
The invention relates in general to a frequency offset correction technique for an oscillation signal source, and more particularly to a technique for correcting a frequency offset of an oscillation signal source caused by a loading amount.
2. Description of the Related Art
Most electronic systems are equipped with at least one oscillation signal source (e.g., a crystal oscillator) that provides clock signals as references for circuit operations. How to maintain a stable output frequency of an oscillation signal under all circumstances is an important issue. For example, a frequency drift may arise in output signals of an oscillation signal source when an ambient temperature changes. To prevent functions of an electronic system from being affected by environmental factors, a frequency offset compensating mechanism is essential in electronic systems.
Accompanied by advancements in electronic-related technologies, wireless communication apparatuses in all diversities are becoming increasingly popular. Circuits in current wireless communication apparatuses generally need two types of reference clock signals—system clock signals and real-time clock signals. System clock signals have a higher frequency (usually in MHz range), and are fundamental signals that many circuits refer to for operations. Real-time clock signals have a lower frequency (usually in kHz range), and mainly serve for assisting a wireless communication apparatus to count a real time (e.g., current hour, minute and second) to facilitate the wireless communication apparatus to synchronize and/or communicate with other wireless systems such as base stations. In a conventional hardware configuration, two sets of oscillation signal sources, having different oscillation frequencies and respectively outputting system clock signals and real-time signals, are arranged in the same wireless communication apparatus.
To reduce hardware costs, in another conventional approach, system clock signals and real-time clock signals are designed to share the same oscillation signal source. FIG. 1 is an example showing a partial schematic diagram of such type of electronic system. In the example, system clock signals have a frequency of 26 MHz, and real-time clock signals have a frequency of 32 kHz. The output frequency of an oscillation signal source 12 is 26 MHz and the output signal is provided to a buffer amplifier 14 and a frequency divider 16. The buffer amplifier 14 provides the amplified 26 MHz signals to its subsequent circuits (e.g., a baseband circuit) to serve as system clock signals. The frequency divider 16 divides the 26 MHz signal to generate signals having a 32 kHz frequency. A frame counter 17, coupled to one of the outputs of the frequency divider 16, counts the number of 32 kHz pulses from the frequency divider 16, and changes its output signal when the counting result reaches a predetermined threshold. The frame counter 17, which may be regarded as another frequency divider, outputs signals to control the system events.
In practice, the electronic system in FIG. 1 may be a mobile phone. In order to have proper operations, the mobile phone has to be synchronized to a base station which provides communication services. The synchronization is accomplished by decoding and tracking the difference between local clocks and the clocks in the base station. In the event that the clock signals of the mobile phone become inaccurate (e.g., when a frequency offset arises due to an ambient temperature change), settings of a coarse-tuning capacitor array 18A and/or a fine-tuning capacitor array 18B may be adjusted (i.e., equivalent to changing a loading amount of the oscillation signal source 12) to correct the output frequency of the oscillation signal source 12.
It is well-known to those skilled in the art that a mobile phone enters from a normal operation mode to a low power consumption standby mode at a predetermined interval. To lower the overall power dissipation, in the low power consumption mode, the buffer amplifier 14 and its subsequent circuits that utilize the system clock signals are turned off. The tuning capacitor arrays are set to their low capacitance state. It is apparent that the corresponding loading amounts that the oscillation signal source 12 needs to drive are different between the normal operation mode and the low power consumption mode. The change in the loading amount also causes a frequency offset in output signals of the oscillation signal source 12, leading the frequency of the real-time clock signals to deviate from 32 kHz in the low power consumption mode. However, as the mobile phone in the low power consumption mode does not synchronize with the base station, reference information for correcting the frequency offset cannot be acquired. Thus, when the frequency offset becomes too excessive, the “real time” that is determined based on the real-time clock signals may significantly deviate from the desired value causing the mobile phone to return to the normal operation mode either too early or too late potentially failing the communication with a base station.